Phone AI chip, architecture studyArchitecture + RTL
AT1
Phones generate text slowly because they spend their time moving weights, not multiplying them. AT1 is designed around that: move fewer bytes, move them a shorter distance, and compute right beside the memory banks.
- Verilog
- Yosys
- SkyWater 130 nm
- Python simulator
Speed and energy come from a simulator calibrated to measured Snapdragon numbers, assuming 70% speculative decoding acceptance. Area comes from Yosys synthesis. No silicon yet.
- faster than a phone NPU
- 5.5×
- faster than a phone NPULlama 3.1 8B, 4k context
- less energy per token
- 8×
- less energy per tokensame run
- area per weight
- 0.45×
- area per weightternary sign select vs a W4A8 multiplier
- SkyWater synthesis
- 130 nm
- SkyWater synthesisthree Verilog blocks, all tests passing